Jagdish Chand's Location
Bengaluru, KA, IN
Jagdish Chand's Education
- IIT Madras
Master of Technology (M.Tech.) (Microelectronics and VLSI design)
2002 - 2004 - AMIE, Institution of Engineers
Bachelor's degree (Electrical, Electronics and Communications Engineering)
1999 - 2002
Jagdish Chand's Skills
- Analog Circuit Design
- SERDES
- Clock Data Recovery
- Silicon Validation
- Mixed signal simulations
- High Voltage Design
- Mixed Signal
- CMOS
- ASIC
- Characterization
Jagdish Chand's Summary
Jagdish chand, based in Bengaluru, KA, IN, is currently a Design Manager at Texas Instruments. Jagdish chand holds a 2002 - 2004 Master of Technology (M.Tech.) in Microelectronics and VLSI design @ IIT Madras. With a robust skill set that includes Analog Circuit Design, SERDES, Clock Data Recovery, Silicon Validation, Mixed signal simulations and more, Jagdish chand contributes valuable insights to the industry. Jagdish chand has 1 email on RocketReach.
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