Ing Marc-André Parent's Location

Saint-Basile-le-Grand, QC, CA

Ing Marc-André Parent's Work

Ing Marc-André Parent's Education

  • Université du Québec - Ecole de Technologie supérieure

    BAC (Génie Électrique)

    2006 - 2010
  • Collège Ahuntsic

    DEC (Technologie du génie électrique)

    2003 - 2006

Ing Marc-André Parent's Skills

  • FPGA
  • CPLD
  • Microcontrollers
  • JTAG
  • PS/2
  • I2C
  • SPI
  • RS232
  • USB
  • EDID

Ing Marc-André Parent's Summary

Ing Marc-André Parent, based in Saint-Basile-le-Grand, QC, CA, is currently a Hardware Design Engineer at EERS, bringing experience from previous roles at Lyft, 8D Technologies, Bombardier Transportation and SERVO-ROBOT Inc.. Ing Marc-André Parent holds a 2006 - 2010 BAC in Génie Électrique @ Université du Québec - Ecole de Technologie supérieure. With a robust skill set that includes FPGA, CPLD, Microcontrollers, JTAG, PS/2 and more, Ing Marc-André Parent contributes valuable insights to the industry. Ing Marc-André Parent has 1 email on RocketReach.
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