Imre Mados Email
Principal Formal Verification Engineer @ Codasip
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Imre Mados Location
- Budapest, HU
Imre Mados Work
- Principal Formal Verification Engineer @ (May 2026 - Present)
- Senior Formal Verification Engineer @ (July 2024 - February 2026)
- Staff Engineer @ (October 2018 - June 2023)
- Senior Engineer @ (January 2015 - September 2018)
- Engineer @ (July 2014 - December 2014)
- Design Verification Engineer @ (February 2010 - June 2014)
Imre Mados Education
- Universitatea Politehnica din Timişoara
Master of Science (MSc) (Electrical, Electronics and Communications Engineering)
Imre Mados Skills
- Functional Verification
- Specman
- SystemVerilog
- NCSim
- ModelSim
- ASIC
- FPGA
- Verilog
- VHDL
- C++
- TCL
- ClearCase
- SoC
- Integrated Circuit Design
- SystemC
- eRM
- GNU Make
- Tortoise SVN
- Debugging
- EDA
- C
- UVM
- Questa
- Universal Verification Methodology (UVM)
- Application Specific Integrated Circuits Asic
- Universal Verification Methodology Uvm
- Universal Verification Methodology
- Application Specific Integrated Circuits
Imre Mados Summary
- Imre Mados, based in Budapest, HU, is currently a Principal Formal Verification Engineer at Codasip. Imre Mados brings experience from previous roles at Codasip, Arm and ARM. Imre Mados holds a Master of Science (MSc) in Electrical, Electronics and Communications Engineering @ Universitatea Politehnica din Timişoara. With a robust skill set that includes Functional Verification, Specman, SystemVerilog, NCSim, ModelSim and more.
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