Ilya Denisov Email
Principal Engineer (ASIC design front-end) @ Baikal Electronics
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Ilya Denisov Location
- Saint Petersburg, RU
Ilya Denisov Work
- Principal Engineer (ASIC design front-end) @ (December 2023 - Present)
- Senior Engineer (ASIC design front-end) @ (October 2022 - November 2023)
- Staff Engineer (ASIC design front-end) @ (August 2020 - September 2022)
- Principal Engineer (FPGA design) @ JSC TIAS (August 2017 - August 2020)
- Senior Engineer (FPGA design) @ SPb branch of SRC RPKB (January 2017 - August 2017)
- Senior engineer (FPGA design) @ JSC "Zaslon" (ex. SRC "Leninetz Plant" Inc) (April 2010 - January 2017)
- Hardware engineer (ASIC design front-end) @ Mirantis / Genesis Microchip (January 2008 - January 2009)
- Electronics engineer (FPGA and software design) @ SRC "MPO Gidropribor" (May 2005 - December 2007)
Ilya Denisov Education
- Educacentre Language School
FCE certificate (English language)
2006-2008 - Saint Petersburg State University of Aerospace and Instrumentation
Engineer's degree (Radioelectronic systems)
1999-2005
Ilya Denisov Skills
- FPGA
- Electronics
- Hardware
- Simulations
- Verilog
- VHDL
- Embedded Systems
- Integrated Circuit Design
- C
- PCB design
Ilya Denisov Summary
- Ilya Denisov, based in Saint Petersburg, RU, is currently a Principal Engineer (ASIC design front-end) at Baikal Electronics. Ilya Denisov brings experience from previous roles at Syntacore, ON Semiconductor, JSC TIAS and SPb branch of SRC RPKB. Ilya Denisov holds a 2006 - 2008 FCE certificate in English language @ Educacentre Language School. With a robust skill set that includes FPGA, Electronics, Hardware, Simulations, Verilog and more. Ilya Denisov has 2 emails on RocketReach.
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