Hung Vuong Email & Phone Number
Lab Management @ Ciena
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Hung Vuong Location
- San Jose, CA, US
Hung Vuong Work
- Lab Management @ (February 2022 - Present)
- Test Engineer @ (August 2021 - February 2022)
- Manufacturing Design Engineer @ (September 2019 - June 2021)
- Hardware Test Engineer @ (February 2016 - July 2019)
- Manufactory Test Engineer (Server NPI and Sustaining) @ (April 2015 - February 2016)
Hung Vuong Education
- San José State University
Bachelor of Science (BS) (Computer Engineering)
2011-2014 - Evergreen Valley College
Computer Engineering
Hung Vuong Skills
- 2D graphics
- 3D Graphics
- AutoCAD
- C (Programming Language)
- Data Analysis
- Debugging
- Design Verification Testing
- Digital Designs
- Electrical Troubleshooting
- FW
- Field-Programmable Gate Arrays (FPGA)
- Function Generator
- Functional Testing
- Functional Verification
- Joint Test Action Group (JTAG)
- Lab Testing
- Logic Analyzer
- Microsoft Office
- Oscilloscope
- Performance Metrics
- Problem Solving
- Python (Programming Language)
- Schematic
- Scripting
- Spectrum Analyzer
- SystemVerilog
- Teamwork
- Technical Support
- Test Planning
- Testing
- Time Management
- Verilog
Hung Vuong Summary
- Hung Vuong, based in San Jose, CA, US, is currently a Lab Management at Ciena. Hung Vuong brings experience from previous roles at Ciena, KLA, Cisco and Quanta Computer USA, Inc.. Hung Vuong holds a 2011 - 2014 Bachelor of Science (BS) in Computer Engineering @ San José State University. With a robust skill set that includes 2D graphics, 3D Graphics, AutoCAD, C (Programming Language), Data Analysis and more. Hung Vuong has 6 emails on RocketReach.
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