If you need more lookups,
subscriptions start at $34 USD/month.
Hiro Takeishi Location
Yokohama, Kanagawa, JP
Hiro Takeishi Work
Branch Manager @ (July 2025 - Present)
Director @ (November 2010 - August 2025)
Manager, Technology Transfer @ (July 2007 - October 2010)
Manager of Business Operation, Custom Mixed Signal Products Div. @ (April 2005 - June 2007)
Manager of Process Development, Display Solution Business Unit @ (September 2003 - March 2005)
Sr. HV CMOS and BJT Design Engineer @ (January 1997 - August 2003)
Bipolar Device Design Engineer @ (August 1994 - December 1996)
Process Intergation Engineer @ (November 1988 - July 1994)
Engineer @ Yokogawa Hewlett Packard (April 1983 - November 1988)
Hiro Takeishi Education
Kyushu University
BSEE (Electrical Engineering)
1979-1983
Hiro Takeishi Skills
CMOS
Microprocessors
IC
Power Management
Verilog
Silicon
ASIC
EDA
Analog Circuit Design
Product Engineering
Electronics
Cadence Virtuoso
Cadence
JMP
Failure Analysis
Characterization
Simulations
Device Characterization
Semiconductors
Semiconductor Industry
BiCMOS
Process Integration
Semiconductor Device
Illustrator
Business Analysis
Process Improvement
Application Specific Integrated Circuits Asic
Application Specific Integrated Circuits
Hiro Takeishi Summary
Hiro Takeishi, based in Yokohama, Kanagawa, JP, is currently a Branch Manager at SystematIC Design B.V.. Hiro Takeishi brings experience from previous roles at X-FAB, Maxim Integrated Products and Texas Instruments. Hiro Takeishi holds a 1979 - 1983 BSEE in Electrical Engineering @ Kyushu University. With a robust skill set that includes CMOS, Microprocessors, IC, Power Management, Verilog and more. Hiro Takeishi has 1 emails on RocketReach.
Looking for a different Hiro Takeishi?
Find contact details for 700 million professionals.