Hiro Takeishi Email
Branch Manager @ SystematIC Design B.V.
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Hiro Takeishi Location
- Yokohama, Kanagawa, JP
Hiro Takeishi Work
- 2025 -now Branch Manager @
- 2010 -2025 Director @
- 2007 -2010 Manager, Technology Transfer @
- 2005 -2007 Manager of Business Operation, Custom Mixed Signal Products Div. @
- 2003 -2005 Manager of Process Development, Display Solution Business Unit @
- 1997 -2003 Sr. HV CMOS and BJT Design Engineer @
- 1994 -1996 Bipolar Device Design Engineer @
- 1988 -1994 Process Intergation Engineer @
- 1983 -1988 Engineer @ Yokogawa Hewlett Packard
Hiro Takeishi Education
- Kyushu University
BSEE (Electrical Engineering)
1979-1983
Hiro Takeishi Skills
- CMOS
- Microprocessors
- IC
- Power Management
- Verilog
- Silicon
- ASIC
- EDA
- Analog Circuit Design
- Product Engineering
- Electronics
- Cadence Virtuoso
- Cadence
- JMP
- Failure Analysis
- Characterization
- Simulations
- Device Characterization
- Semiconductors
- Semiconductor Industry
- BiCMOS
- Process Integration
- Semiconductor Device
- Illustrator
- Business Analysis
- Process Improvement
- Application Specific Integrated Circuits Asic
- Application Specific Integrated Circuits
Hiro Takeishi Summary
- Hiro Takeishi, based in Yokohama, Kanagawa, JP, is currently a Branch Manager at SystematIC Design B.V.. Hiro Takeishi brings experience from previous roles at X-FAB, Maxim Integrated Products and Texas Instruments. Hiro Takeishi holds a 1979 - 1983 BSEE in Electrical Engineering @ Kyushu University. With a robust skill set that includes CMOS, Microprocessors, IC, Power Management, Verilog and more. Hiro Takeishi has 1 emails on RocketReach.
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Hiro Takeishi
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