Herbert Rivera-Sanchez Email & Phone Number
PMTS Silicon Design Engineer @ AMD
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Herbert Rivera-Sanchez Location
- Durham, NC, US
Herbert Rivera-Sanchez Work
- 2026 -now PMTS Silicon Design Engineer @
- 1985 -2011 Senior Verification and SoC Engineer (Earlier Roles) @ Multiple Companies (Open-Silicon, AMCC, Nortel, IBM)
- 2021 -2026 Principal Verification Engineer - SoC, Memory and Interconnect Verification @
- 2018 -2020 Solutions Architect and Verification Methodology Lead (Multiple Roles) @
Herbert Rivera-Sanchez Education
- North Carolina State University
Master of Science (Electrical and Computer Engineering)
1987-1990
Herbert Rivera-Sanchez Skills
- Functional Verification
- Verilog
- Open Verification Methodology
- Architecture
- Integration
- Specman
- ASIC
- Cadence
- EDA
- SoC
- SystemVerilog
- Architectures
- Analysis
- RTL Design
- FPGA
- Debugging
- IC
- Embedded Systems
- Semiconductors
- TCL
- Perl
- System on a Chip (SoC)
- Application-Specific Integrated Circuits (ASIC)
- VIP
- System on a Chip Soc
- IP
- Application Specific Integrated Circuits Asic
- Solutions Architect
- System on a Chip
- Application Specific Integrated Circuits
Herbert Rivera-Sanchez Summary
- Herbert Rivera-Sanchez, based in Durham, NC, US, is currently a PMTS Silicon Design Engineer at AMD. Herbert Rivera-Sanchez brings experience from previous roles at Multiple Companies (Open-Silicon, AMCC, Nortel, IBM), Marvell Technology and Cadence Design Systems. Herbert Rivera-Sanchez holds a 1987 - 1990 Master of Science in Electrical and Computer Engineering @ North Carolina State University. With a robust skill set that includes Functional Verification, Verilog, Open Verification Methodology, Architecture, Integration and more. Herbert Rivera-Sanchez has 1 mobile phone numbers on RocketReach.
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