Henry Hsu Email

Henry Hsu Email

Staff ASIC SerDes Digital Design engineer @ Avago Technologies

Henry Hsu's Location

San Jose, CA, US

Henry Hsu's Work

Henry Hsu's Education

  • Santa Clara University

    Master of Science (Electrical Engineering)

  • University of Toronto

    Bachelor of Science (Electrical Engineering)

Henry Hsu's Skills

  • RTL design
  • Static Timing Analysis
  • Verilog
  • ASIC
  • SoC
  • Timing Closure
  • Logic Synthesis
  • VLSI
  • EDA
  • SERDES

Henry Hsu's Summary

Henry Hsu, based in San Jose, CA, US, is currently a Staff ASIC SerDes Digital Design engineer at Avago Technologies, bringing experience from previous roles at LSI Corporation, LSI Logic, Maxim Integrated Products and Winbond. Henry Hsu holds a Master of Science in Electrical Engineering @ Santa Clara University. With a robust skill set that includes RTL design, Static Timing Analysis, Verilog, ASIC, SoC and more, Henry Hsu contributes valuable insights to the industry. Henry Hsu has 1 email on RocketReach.

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