Harsh Parekh's Location
Santa Clara, CA, US
Harsh Parekh's Work
- Engineer, Staff II - IC Design @ Broadcom
- Design Engineer @ AMD
- Senior Engineer @ InterDigital, Inc.
Harsh Parekh's Education
- Columbia University, New York
MS (Computer Engineering (ECE))
2008 - 2009 - University of Mumbai, SPCE
BE (Electronics Engineering)
2004 - 2008
Harsh Parekh's Skills
- SystemVerilog
- x86 Assembly
- ASIC
- C/C++
- Computer Architecture
- VLSI
- Verilog
- SoC
- VHDL
- Perl
Harsh Parekh's Summary
Harsh Parekh, based in Santa Clara, CA, US, is currently a Hardware Engineer at Apple, bringing experience from previous roles at Broadcom Inc. and AMD. Harsh Parekh holds a 2008 - 2009 MS in Computer Engineering (ECE) @ Columbia University, New York. With a robust skill set that includes SystemVerilog, x86 Assembly, ASIC, C/C++, Computer Architecture and more, Harsh Parekh contributes valuable insights to the industry. Harsh Parekh has 3 emails on RocketReach.
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