Harsh Parekh Email & Phone Number
Hardware Engineer @ Apple
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Harsh Parekh Location
- Santa Clara, CA, US
Harsh Parekh Work
- 2021 -now Hardware Engineer @
- 2019 -2021 Principal Engineer @
- 2015 -2019 Engineer, Sr. Staff @
- 2013 -2015 Engineer, Staff II - IC Design @
- 2011 -2013 Design Engineer @
- 2010 -2011 Senior Engineer @
Harsh Parekh Education
- Columbia University, New York
MS (Computer Engineering (ECE))
2008-2009 - University of Mumbai, SPCE
BE (Electronics Engineering)
2004-2008
Harsh Parekh Skills
- SystemVerilog
- x86 Assembly
- ASIC
- C/C++
- Computer Architecture
- VLSI
- Verilog
- SoC
- VHDL
- Perl
- C++
- Asic Design
- Logic Synthesis
- Functional Verification
- RTL design
Harsh Parekh Summary
- Harsh Parekh, based in Santa Clara, CA, US, is currently a Hardware Engineer at Apple. Harsh Parekh brings experience from previous roles at Broadcom Inc., Broadcom and AMD. Harsh Parekh holds a 2008 - 2009 MS in Computer Engineering (ECE) @ Columbia University, New York. With a robust skill set that includes SystemVerilog, x86 Assembly, ASIC, C/C++, Computer Architecture and more. Harsh Parekh has 4 emails and 1 mobile phone numbers on RocketReach.
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