Harry Yang Email
Senior Principal Verification Engineer @ Marvell India
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Harry Yang Location
- Ottawa, ON, CA
Harry Yang Work
- Senior Principal Verification Engineer @ (April 2026 - Present)
- Principal Verification Engineer @ (July 2022 - April 2026)
- Senior Staff ASIC Verification Engineer @ (January 2014 - July 2022)
- Senior ASIC Verification Engineer @ (September 2009 - October 2013)
- ASIC verification consultant @ Diablo Technologies (February 2009 - August 2009)
- verification engineer @ (November 2007 - February 2009)
- verification prime @ Nortel (February 2005 - October 2007)
- verification team lead @ (October 2003 - February 2005)
- verification engineer @ (May 2000 - September 2002)
- Design analysis engineer @ (August 1997 - May 1999)
Harry Yang Education
- Carleton University
M.Eng (Electronics Engineering)
1999-2000 - Tsinghua University
B.Eng (Microelectronics)
1991-1996
Harry Yang Skills
- RTL design
- SystemVerilog
- Semiconductors
- Integrated Circuits Ic
- UVM
- PCIe
- ASIC
- Static Timing Analysis
- VMM
- FPGA
- SoC
- Verilog
- RTL coding
- Perl
- EDA
- Debugging
- TCL
- Functional Verification
- IC
- Integrated Circuits
Harry Yang Summary
- Harry Yang, based in Ottawa, ON, CA, is currently a Senior Principal Verification Engineer at Marvell Technology. Harry Yang brings experience from previous roles at Marvell Technology, Xilinx, IDT and Diablo Technologies. Harry Yang holds a 1999 - 2000 M.Eng in Electronics Engineering @ Carleton University. With a robust skill set that includes RTL design, SystemVerilog, Semiconductors, Integrated Circuits Ic, UVM and more. Harry Yang has 2 emails on RocketReach.
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