Harry Yang Location
Ottawa, ON, CA
Harry Yang Work
- 2026 - now Senior Principal Verification Engineer @ Marvell India
- 2022 - 2026 Principal Verification Engineer @ Marvell India
- 2014 - 2022 Senior Staff ASIC Verification Engineer @ Xilinx
- 2009 - 2013 Senior ASIC Verification Engineer @ IDT - Integrated Device Technology, Inc.(acquired by Renesas)
- 2009 - 2009 ASIC verification consultant @ Diablo Technologies
- 2007 - 2009 verification engineer @ Neterion
- 2005 - 2007 verification prime @ Nortel
- 2003 - 2005 verification team lead @ Exavio
- 2000 - 2002 verification engineer @ Cisco
- 1997 - 1999 Design analysis engineer @ Semiconductor Insights
Harry Yang Education
- Carleton University
M.Eng (Electronics Engineering)
1999 - 2000 - Tsinghua University
B.Eng (Microelectronics)
1991 - 1996
Harry Yang Skills
- RTL design
- SystemVerilog
- Semiconductors
- Integrated Circuits Ic
- UVM
- PCIe
- ASIC
- Static Timing Analysis
- VMM
- FPGA
Harry Yang Summary
Harry Yang, based in Ottawa, ON, CA, is currently a Senior Principal Verification Engineer at Marvell Technology. Harry Yang brings experience from previous roles at Marvell Technology, Xilinx, IDT and Diablo Technologies. Harry Yang holds a 1999 - 2000 M.Eng in Electronics Engineering @ Carleton University. With a robust skill set that includes RTL design, SystemVerilog, Semiconductors, Integrated Circuits Ic, UVM and more. Harry Yang has 2 emails on RocketReach.
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Top Marvell India Employees
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Santa Clara, CA, US55+ -
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Vice President Marketing at Marvell India
California, United States21 -
Ken Chang
Senior Vice President at Marvell India
Los Altos, CA, US33
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