Harish Venkatesh's Location

San Jose, CA, US

Harish Venkatesh's Work

Harish Venkatesh's Education

  • Coventry University

    Master of Science - MS (VLSI System Design)

    2005 - 2008
  • Visvesvaraya Technological University

    B.E (Electronic and Communication)

    2001 - 2004

Harish Venkatesh's Skills

  • Static Timing Analysis
  • Physical Design
  • Physical Verification
  • RTL Synthesis
  • Logic Synthesis
  • Place & Route
  • DRC
  • SoC
  • Floorplanning
  • RTL

Harish Venkatesh's Summary

Harish Venkatesh, based in San Jose, CA, US, is currently a Principal Engineer at Marvell Technology, bringing experience from previous roles at Innovium Inc., Cadence Design Systems, SmartPlay Technologies - An Aricent Company and Arm. Harish Venkatesh holds a 2005 - 2008 Master of Science - MS in VLSI System Design @ Coventry University. With a robust skill set that includes Static Timing Analysis, Physical Design, Physical Verification, RTL Synthesis, Logic Synthesis and more, Harish Venkatesh contributes valuable insights to the industry. Harish Venkatesh has 4 emails and 1 mobile phone number on RocketReach.

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