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Hari Patel Location
Ahmedabad, GJ, IN
Hari Patel Work
2016 -now Co-Founder and EVP @
2012 -2016 Technical Lead @
2011 -2012 IP (AMS) verification engineer @
2009 -2010 Verification Engineer II @
2007 -2009 ASIC Verification Engineer @
Hari Patel Education
Nirma University
B.Tech (Electronics & Communication)
2003-2007
Hari Patel Skills
DO-254
DO-178
Avionics
System on a Chip (SoC)
Embedded Systems
Verification and Validation (V&V)
RTL Design
Physical Design
Verilog
Functional Verification
NCSim
SystemVerilog
Open Verification Methodology
Perl
Debugging
UVM
ASIC
Veritas Cluster Server
SPICE
Simulations
Shell Scripting
C++
VLSI
Application-Specific Integrated Circuits (ASIC)
C
Universal Verification Methodology (UVM)
Very-Large-Scale Integration (VLSI)
Project Management
Leadership
FPGA
Microsoft Office
Verification
Management
Hari Patel Summary
Hari Patel, based in Ahmedabad, GJ, IN, is currently a Co-Founder and EVP at Alpha Numero (ANTS Global Systems Pvt Ltd). Hari Patel brings experience from previous roles at eInfochips (An Arrow Company), AMD, LSI Corporation and e-Infochips. Hari Patel holds a 2003 - 2007 B.Tech in Electronics & Communication @ Nirma University. With a robust skill set that includes DO-254, DO-178, Avionics, System on a Chip (SoC), Embedded Systems and more. Hari Patel has 2 emails and 4 mobile phone numbers on RocketReach.
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