Hardik Shroff Email & Phone Number
IP Logic Design @ Intel Corporation
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Hardik Shroff Location
- San Jose, CA, US
Hardik Shroff Work
- 2017 -now IP Logic Design @
- 2011 -2017 SOC Logic Design Engineer @
Hardik Shroff Education
- California State University-Sacramento
Master of Science (M.S.) (Electrical and Electronics Engineering)
2008-2010
Hardik Shroff Skills
- Logic Design
- Computer Architecture
- CDC
- Coding Languages
- Logic Synthesis
- Functional Verification
- Perl
- PCIe
- Xilinx ISE
- Lint
- Verilog
- Formal Verification
- TCL
- FPGA
- SoC
- VHDL
- ModelSim
- Primetime
- Timing Closure
- SystemVerilog
- Design
- Static Timing Analysis
- Verification
Hardik Shroff Summary
- Hardik Shroff, based in San Jose, CA, US, is currently a IP Logic Design at Intel Corporation. Hardik Shroff brings experience from previous roles at Intel Corporation. Hardik Shroff holds a 2008 - 2010 Master of Science (M.S.) in Electrical and Electronics Engineering @ California State University-Sacramento. With a robust skill set that includes Logic Design, Computer Architecture, CDC, Coding Languages, Logic Synthesis and more. Hardik Shroff has 1 emails and 1 mobile phone numbers on RocketReach.
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