Hardik Sheth Email & Phone Number
Co-Founder | CTO @ Bacancy Systems
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Hardik Sheth Location
- Anand, GJ, IN
Hardik Sheth Work
- Co-Founder | CTO @ (March 2026 - Present)
- Co-Founder | CEO @ (April 2021 - March 2026)
- Manager @ (April 2018 - April 2021)
- Project Manager @ (May 2013 - April 2021)
- Team Leader - IP and Product Design Group - @ (March 2010 - May 2013)
- IP Design Engineer @ (September 2005 - March 2010)
Hardik Sheth Education
- Sikkim Manipal University
Master of Business Administration (MBA) (Project Management)
2010-2011 - Hemchandracharya North Gujarat University
B.E. (Electronics & Communication)
2001-2005 - New Era High School
Hardik Sheth Skills
- RTL design
- ASIC
- FPGA
- USB
- ModelSim
- Static Timing Analysis
- Digital Design
- RTL coding
- I2C
- Functional Verification
- Microprocessors
- DSP
- Analog
- Microcontrollers
- Hardware Design
- Analog Circuit Design
- Hardware Architecture
- SoC
- Digital Signal Processors
- Debugging
- Field-Programmable Gate Arrays (FPGA)
- Integrated Circuit Design
- SPI
- System on a Chip (SoC)
- Verilog
- Team Leadership
- Solutions
- Digital Signal
- Product Development
- Integrated Circuit
- Customer Service
Hardik Sheth Summary
- Hardik Sheth, based in Anand, GJ, IN, is currently a Co-Founder | CTO at Bacancy Systems. Hardik Sheth brings experience from previous roles at Bacancy Systems and System Level Solutions ( India ) Pvt. Ltd. Hardik Sheth holds a 2010 - 2011 Master of Business Administration (MBA) in Project Management @ Sikkim Manipal University. With a robust skill set that includes RTL design, ASIC, FPGA, USB, ModelSim and more. Hardik Sheth has 1 emails and 1 mobile phone numbers on RocketReach.
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