Han Tan Email
Circuit Design Engineering Manager @ Intel Corporation
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Han Tan Location
- Bayan Lepas, MY
Han Tan Work
- 2026 -now Circuit Design Engineering Manager @
- 2022 -2026 Circuit Design Engineer @
- 2015 -2022 Layout Design Engineer @
Han Tan Education
- Universiti Putra Malaysia
Bachelor of Science (BSc) Major Electronic Instrumentation (Engineering Physics/Applied Physics/Semiconductor)
2011-2015
Han Tan Summary
- Han Tan, based in Bayan Lepas, MY, is currently a Circuit Design Engineering Manager at Intel. Han Tan brings experience from previous roles at Intel. Han Tan holds a 2011 - 2015 Bachelor of Science (BSc) Major Electronic Instrumentation in Engineering Physics/Applied Physics/Semiconductor @ Universiti Putra Malaysia. Han Tan has 3 emails on RocketReach.
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