Girish Nayak Email
VLSI physical design engineer trainee @ RV-VLSI VLSI and Embedded Systems Design Center
Girish Nayak's Location
Bengaluru, KA, IN
Girish Nayak's Education
- RV-VLSI VLSI and Embedded Systems Design Center
Semiconductor Manufacturing Technology
2018 - 2019 - REVA UNIVERSITY, BANGALORE
Bachelor of Technology (Electrical, Electronic and Communications Engineering Technology/Technician)
2015 - 2018 - M.N.Tecnical institution
diploma (Electrical, Electronic and Communications Engineering Technology/Technician)
2013 - 2015
Girish Nayak's Skills
- Physical Design
- Icc
- Static Timing Analysis
- Floorplanning
- Clock Tree Synthesis
- PNR
- TCL
- Primetime
- Shell Scripting
- Perl
Girish Nayak's Summary
Girish Nayak, based in Bengaluru, KA, IN, is currently a VLSI physical design engineer trainee at RV-VLSI VLSI and Embedded Systems Design Center. Girish Nayak holds a 2018 - 2019 Semiconductor Manufacturing Technology @ RV-VLSI VLSI and Embedded Systems Design Center. With a robust skill set that includes Physical Design, Icc, Static Timing Analysis, Floorplanning, Clock Tree Synthesis and more, Girish Nayak contributes valuable insights to the industry.
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