Gerry Chen Email & Phone Number
SOC Design Verification Engineer @ Intel Corporation
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Gerry Chen Location
- Portland, OR, US
Gerry Chen Work
- 2018 -now SOC Design Verification Engineer @
- 2018 -2018 Senior ASIC Design Verification Engineer @
- 2013 -2018 Pre-Silicon Validation Integration Engineer @
- 2010 -2013 Senior Engineer, ASIC Design Verification @
- 2007 -2008 Engineer Intern, ASIC Design Verification @
- 2006 -2006 Information System Representative @
Gerry Chen Education
- University of Toronto
Master of Engineering (Electrical and Computer Engineering)
2009-2010 - University of Toronto
Bachelor of Applied Science (Electrical Engineering)
2004-2009
Gerry Chen Skills
- SystemVerilog
- Design
- Primus
- Intel
- ASIC
- Telecommunications
- IP
- Education
- Computer Architecture
- FPGA
- VLSI
- Verilog
- SoC
- C
- Debugging
- Verification
- Asic Design
- Functional Verification
- IC
Gerry Chen Summary
- Gerry Chen, based in Portland, OR, US, is currently a SOC Design Verification Engineer at Intel Corporation. Gerry Chen brings experience from previous roles at SpaceX, Intel Corporation, AMD and AMD (formerly ATI Technologies Inc.). Gerry Chen holds a 2009 - 2010 Master of Engineering in Electrical and Computer Engineering @ University of Toronto. With a robust skill set that includes SystemVerilog, Design, Primus, Intel, ASIC and more. Gerry Chen has 5 emails and 4 mobile phone numbers on RocketReach.
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