Gerard de Wit Email
Senior Digital Design Engineer @ NXP Semiconductors
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Gerard de Wit Location
- Arnhem-Nijmegen Metropolitan, GE, NL
Gerard de Wit Work
- Senior Digital Design Engineer @ (February 2014 - Present)
- Senior Digital Design Engineer @ (May 2013 - January 2014)
- Senior Digital IC designer @ (February 2009 - May 2013)
- Senior Digital IC design @ (August 2008 - January 2009)
- Senior Digital IC Designer @ (October 2006 - August 2008)
- Senior Digital IC Designer @ (January 1988 - January 2006)
Gerard de Wit Education
- Universiteit Twente
Master's degree (Thibats, Fanaat)
1979-1987 - RSG Winkler Prins, Veendam
VWO (highschool)
1973-1979
Gerard de Wit Skills
- DFT
- IC
- Formal Verification
- Logic Synthesis
- Functional Verification
- Verilog
- VHDL
- NCSim
- Mixed Signal
- Power Management
- Low-power Design
- SoC
- CMOS
- AMBA AHB
- Integrated Circuit Design
- RTL design
- TCL
- Static Timing Analysis
- Digital Electronics
- Physical Verification
- Processors
- ASIC
- Microelectronics
- Wit
- Semiconductors
- Design
- Low Power Design
Gerard de Wit Summary
- Gerard de Wit, based in Arnhem-Nijmegen Metropolitan Area, GE, NL, is currently a Senior Digital Design Engineer at NXP Semiconductors. Gerard de Wit brings experience from previous roles at NVIDIA, ST-Ericsson, ST-NXP wireless and NXP. Gerard de Wit holds a 1979 - 1987 Master's degree in Thibats, Fanaat @ Universiteit Twente. With a robust skill set that includes DFT, IC, Formal Verification, Logic Synthesis, Functional Verification and more. Gerard de Wit has 1 emails on RocketReach.
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