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Gerald Bennett Location
El Dorado Hills, CA, US
Gerald Bennett Work
2022 -now SOC Design Lead @
2014 -2022 Memory PHY Logic Execution Lead @
2011 -2014 RTL Design Lead @
2006 -2011 Test Quality and Content Manager @
2004 -2006 Execution Cluster Manager @
2001 -2004 Integer Execution Cluster Manager @
1998 -2001 Design Unit Leader @
1998 -1998 Software Engineer @
1996 -1998 Design Unit Leader @
Gerald Bennett Education
University of California, Davis
(Bachelor of Science, Electrical Engineering)
1986-1990
Gerald Bennett Skills
RTL design
Processors
Design
Pumps
CMOS
Semiconductors
Microprocessors
Static Timing Analysis
Computer Architecture
Logic Design
SystemVerilog
Hardware Architecture
Debugging
Project Management
Low Power Design
Intel
Java
Microsoft Office
Timing Closure
DFT
Manufacturing
VLSI
SoC
Memory
Verilog
IC
PHY
Gerald Bennett Summary
Gerald Bennett, based in El Dorado Hills, CA, US, is currently a SOC Design Lead at Intel Corporation. Gerald Bennett brings experience from previous roles at Intel Corporation. Gerald Bennett holds a 1986 - 1990 University of California, Davis. With a robust skill set that includes RTL design, Processors, Design, Pumps, CMOS and more. Gerald Bennett has 2 emails and 3 mobile phone numbers on RocketReach.
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