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Gerald Barnett Location
Boston, MA, US
Gerald Barnett Work
Sr Embedded Hardware Engineer @ (May 2025 - Present)
Embedded Hardware Engineer II @ (September 2022 - April 2025)
Electrical Engineer @ (July 2021 - August 2022)
Intramural supervisor @ (August 2017 - May 2021)
Technical Intern - Microcontrollers @ (May 2020 - August 2020)
Gerald Barnett Education
The Johns Hopkins University
Master of Science - MS (Electrical and computer engineering)
2022-2026
Texas Tech University
Bachelor of Science - BS (Computer Engineering)
2016-2021
Gerald Barnett Skills
Circuit Design
Electronics
Embedded Systems
Field-Programmable Gate Arrays (FPGA)
Hardware Bring-up
High Speed Interfaces
Joint Test Action Group (JTAG)
LTSpice
Leadership
Logic Design
Management
Printed Circuit Board (PCB) Design
Signal Integrity
Team Leadership
Team Management
Teamwork
Verilog
Xilinx
Gerald Barnett Summary
Gerald Barnett, based in Boston, MA, US, is currently a Sr Embedded Hardware Engineer at Analog Devices. Gerald Barnett brings experience from previous roles at Analog Devices, Raytheon Missiles & Defense, Texas Tech University and NXP Semiconductors. Gerald Barnett holds a 2022 - 2026 Master of Science - MS in Electrical and computer engineering @ The Johns Hopkins University. With a robust skill set that includes Circuit Design, Electronics, Embedded Systems, Field-Programmable Gate Arrays (FPGA), Hardware Bring-up and more. Gerald Barnett has 1 emails and 1 mobile phone numbers on RocketReach.
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