Gautam Padala Email
Design Verification Engineer @ Cientra
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Gautam Padala Location
- Hyderabad, IN
Gautam Padala Work
- 2017 -now Design Verification Engineer @
- 2015 -2016 VLSI Design Engineer @
- 2012 -2014 MTS Design Engineer @
- 2011 -2011 Software Quality Assurance @
Gautam Padala Education
- San Jose State University
Master's degree (Electrical Engineering)
2010-2012 - Jawaharlal Nehru Technological University
Bachelor's degree (Electrical, Electronics and Communications Engineering)
2006-2010
Gautam Padala Summary
- Gautam Padala, based in Hyderabad, IN, is currently a Design Verification Engineer at Cientra. Gautam Padala brings experience from previous roles at Whizchip Design Technologies Pvt Ltd, Cortina Systems and Marvell Semiconductor. Gautam Padala holds a 2010 - 2012 Master's degree in Electrical Engineering @ San Jose State University.
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