Gary Thorne Email & Phone Number
Semiconductor Design Engineer @ Teradyne
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Gary Thorne Location
- California, United States
Gary Thorne Work
- 2024 -now Semiconductor Design Engineer @
- 2017 -2024 VLSI Design Engineer @ MOSIS
- 2017 -2017 Contractor @
- 2017 -2017 Principal Engineer @ Unemployed
- 1996 -2017 Principal Engineer @
Gary Thorne Education
- University of Illinois Urbana-Champaign 1992-1996
Gary Thorne Skills
- Application-Specific Integrated Circuits (ASIC)
- Semiconductors
- Integrated Circuits (IC)
- Mixed Signal
- CMOS
- ASIC
- IC
- Layout Design
- Layout Versus Schematic (LVS)
- SerDes
- Perl
- Photoshop
- Management
- Integrated Circuits Ic
- Microsoft Excel
- Application Specific Integrated Circuits Asic
- VLSI
- Verilog
- Layout Versus Schematic Lvs
- InDesign
- Application Specific Integrated Circuits
- Integrated Circuits
- Layout Versus Schematic
Gary Thorne Summary
- Gary Thorne, based in California, United States, is currently a Semiconductor Design Engineer at Teradyne. Gary Thorne brings experience from previous roles at MOSIS, Teradyne, Unemployed and Vitesse Semiconductor is now Microsemi. Gary Thorne holds a 1992 - 1996 University of Illinois Urbana-Champaign. With a robust skill set that includes Application-Specific Integrated Circuits (ASIC), Semiconductors, Integrated Circuits (IC), Mixed Signal, CMOS and more. Gary Thorne has 4 emails and 1 mobile phone numbers on RocketReach.
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