Gary Hsu Email & Phone Number
Staff FPGA Design Engineer, Robotics and Digital Solutions, Visualization @ Johnson & Johnson
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Gary Hsu Location
- Cupertino, CA, US
Gary Hsu Work
- Staff FPGA Design Engineer, Robotics and Digital Solutions, Visualization @ (April 2020 - Present)
- Sr Electrical Engineer, Robotics @ Verb Surgical Inc. (November 2018 - April 2020)
- Staff ASIC and FPGA Design Engineer @ (February 2018 - October 2018)
- Senior ASIC and FPGA Design Engineer @ (January 2011 - January 2018)
- ASIC and FPGA Design Engineer @ (January 2007 - January 2011)
- Electronics Engineer Asc @ (January 2005 - January 2007)
- Intern @ (June 2005 - August 2005)
Gary Hsu Education
- Santa Clara University
Master of Science - MS (Electrical and Electronics Engineering)
2009-2011 - Cornell University
Bachelor's degree (Electrical and Electronics Engineering)
2001-2005
Gary Hsu Skills
- Application-Specific Integrated Circuits (ASIC)
- C++
- Digital Designs
- Electronics
- Field-Programmable Gate Arrays (FPGA)
- Matlab
- Scripting
- Simulations
- Static Timing Analysis
- System Testing
- SystemVerilog
- Test Equipment
- Testing
- Timing Closure
- Universal Verification Methodology (UVM)
- VHDL
- Verilog
- Xilinx
Gary Hsu Summary
- Gary Hsu, based in Cupertino, CA, US, is currently a Staff FPGA Design Engineer, Robotics and Digital Solutions, Visualization at Johnson & Johnson. Gary Hsu brings experience from previous roles at Verb Surgical Inc. and Lockheed Martin. Gary Hsu holds a 2009 - 2011 Master of Science - MS in Electrical and Electronics Engineering @ Santa Clara University. With a robust skill set that includes Application-Specific Integrated Circuits (ASIC), C++, Digital Designs, Electronics, Field-Programmable Gate Arrays (FPGA) and more. Gary Hsu has 4 emails and 1 mobile phone numbers on RocketReach.
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