Garrett Chan Email & Phone Number
AIO (All-In-One) Engineer 🛰💻
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Garrett Chan Location
- Los Angeles, CA, US
Garrett Chan Work
- AIO (All-In-One) Engineer 🛰💻 @ Boeing Engineering & Technology Innovation (E&TI) (February 2024 - Present)
- Verification Engineer @ (May 2022 - February 2024)
- Product Engineer @ (December 2021 - May 2022)
- Senior Principal Engineer @ (May 2021 - December 2021)
- Engineering Manager @ (August 2020 - May 2021)
- Senior Member Of Technical Staff @ (April 2018 - August 2020)
- Verification Engineer @ (June 2017 - April 2018)
- Part-Time Lecturer - Computer Engineering and Computer Science @ (September 2017 - January 2018)
- Senior Electrical Engineer (FPGA Verification) @ (August 2015 - May 2017)
- R and D Engineer IC Design 2 @ (May 2015 - August 2015)
- ASIC Engineer @ (June 2013 - May 2015)
- ASIC Intern @ (May 2012 - June 2013)
- CECS 461 and 561 Lab Assistant @ (January 2014 - May 2014)
- Information Techonology Intern @ (April 2011 - September 2011)
- Desktop Support @ (October 2009 - January 2011)
- QA Intern @ (June 2009 - September 2009)
Garrett Chan Education
- California State University, Long Beach
Master's Degree (Computer Engineering)
2013-2015 - California State University, Long Beach
Bachelor of Science (BS) (Computer Engineering)
2008-2013 - California State University Long Beach, College of Engineering
Bachelor of Engineering - BE (Computer Engineering)
Garrett Chan Skills
- SystemVerilog
- Verilog
- C++
- C
- Java
- Visual Studio
- Troubleshooting
- Linux
- Operating Systems
- Programming
- Microsoft Office
- HTML
- DVE
- Verification
- Embedded Systems
- Testing
- FPGA
- Databases
- Networking
- Hardware
- ASIC
- Matlab
- TCP/IP
- Functional Verification
- Universal Verification Methodology (UVM)
- VMM
- Emulation
- Unix
- QuestaSim
- UVMF
- Assertions
- Veloce Emulator
- Field-Programmable Gate Arrays (FPGA)
- VHDL
- Application-Specific Integrated Circuits (ASIC)
- Microcontrollers
- Field Programmable Gate Arrays Fpga
- Application Specific Integrated Circuits Asic
- Universal Verification Methodology Uvm
- Universal Verification Methodology
- Field Programmable Gate Arrays
- Application Specific Integrated Circuits
Garrett Chan Summary
- Garrett Chan, based in Los Angeles, CA, US, is currently a AIO (All-In-One) Engineer 🛰💻 at Boeing Engineering & Technology Innovation (E&TI). Garrett Chan brings experience from previous roles at Amazon, Siemens EDA (Siemens Digital Industries Software), Northrop Grumman and The Aerospace Corporation. Garrett Chan holds a 2013 - 2015 Master's Degree in Computer Engineering @ California State University, Long Beach. With a robust skill set that includes SystemVerilog, Verilog, C++, C, Java and more. Garrett Chan has 2 emails and 2 mobile phone numbers on RocketReach.
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