Garima K. Email
Staff Design Verification Engineer @ Lattice Semiconductor
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Garima K. Location
- Pune, MH, IN
Garima K. Work
- 2024 -now Staff Design Verification Engineer @
- 2022 -2024 Staff Engineer @
- 2021 -2022 Senior Engineer @
- 2020 -2021 Associate Engineer @
- 2018 -2020 Embedded Engineer @
- 2016 -2017 Project Associate @
Garima K. Education
- Centre for Development of Advanced Computing
PG DIPLOMA (Diploma in Embedded Systems)
2017-2018 - Banasthali Vidyapith
M.Tech (VLSI DESIGN)
2015-2017
Garima K. Summary
- Garima K., based in Pune, MH, IN, is currently a Staff Design Verification Engineer at Lattice Semiconductor. Garima K. brings experience from previous roles at Softnautics - A MosChip Company, Softnautics and Griffyn Robotech. Garima K. holds a 2017 - 2018 PG DIPLOMA in Diploma in Embedded Systems @ Centre for Development of Advanced Computing. Garima K. has 1 emails on RocketReach.
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