Garima K. Email
Staff Design Verification Engineer @ Lattice Semiconductor
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Garima K. Location
- Pune, MH, IN
Garima K. Work
- Staff Design Verification Engineer @ (September 2024 - Present)
- Staff Engineer @ (July 2022 - September 2024)
- Senior Engineer @ (July 2021 - July 2022)
- Associate Engineer @ (February 2020 - July 2021)
- Embedded Engineer @ (April 2018 - February 2020)
- Project Associate @ (July 2016 - April 2017)
Garima K. Education
- Centre for Development of Advanced Computing (C-DAC)
PG DIPLOMA (Diploma in Embedded Systems)
2017-2018 - Banasthali Vidyapith
M.Tech (VLSI DESIGN)
2015-2017
Garima K. Summary
- Garima K., based in Pune, MH, IN, is currently a Staff Design Verification Engineer at Lattice Semiconductor. Garima K. brings experience from previous roles at Softnautics - A MosChip Company and Griffyn Robotech. Garima K. holds a 2017 - 2018 PG DIPLOMA in Diploma in Embedded Systems @ Centre for Development of Advanced Computing (C-DAC). Garima K. has 1 emails on RocketReach.
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