Garima Arora Email & Phone Number
Member of Technical Staff @ AMD
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Garima Arora Location
- Santa Clara, CA, US
Garima Arora Work
- Member of Technical Staff @ (July 2022 - Present)
- Senior Silicon Design Engineer @ (August 2020 - June 2022)
- Mixed Signal Design Engineer @ (June 2017 - July 2020)
- Mixed Signal Pre-Silicon Verification Graduate Intern @ (January 2017 - May 2017)
- Grader for EE450: Introduction to Networks @ (June 2016 - August 2016)
- Junior Research Fellow @ (September 2014 - June 2015)
- Senior Associate @ (July 2012 - September 2014)
- Intern @ (January 2011 - June 2011)
Garima Arora Education
- University of Southern California
Master of Science (MS) (VLSI Design)
2015-2017 - Thapar Institute of Engineering & Technology
Bachelor of Engineering (Electronics and Communication)
2008-2012 - DAVPS, Ludhiana, Punjab
XII
1993-2012
Garima Arora Skills
- Matlab
- SystemVerilog
- Microsoft Office
- Cadence Spectre
- Microsoft Word
- Java
- PowerPoint
- Research
- Microsoft Excel
- Cadence Virtuoso
- Xilinx ISE
- English
- VLSI
- Verilog
- VHDL
- Perl
- C
- ModelSim
- Windows
- Outlook
Garima Arora Summary
- Garima Arora, based in Santa Clara, CA, US, is currently a Member of Technical Staff at AMD. Garima Arora brings experience from previous roles at AMD, Intel Corporation and USC Viterbi School of Engineering. Garima Arora holds a 2015 - 2017 Master of Science (MS) in VLSI Design @ University of Southern California. With a robust skill set that includes Matlab, SystemVerilog, Microsoft Office, Cadence Spectre, Microsoft Word and more. Garima Arora has 3 emails and 6 mobile phone numbers on RocketReach.
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