Frederic Morin's Location
Burnaby, BC, CA
Frederic Morin's Work
- Principal Design Engineer Architecture Emulation @ Microchip Technology Inc.
- Staff Product Design Engineer @ Microsemi Corporation
- Staff Asic Design Engineer @ MaxLinear
- Senior Staff Product Development Engineer @ Microsemi Corporation
- Senior Product Design Engineer @ PMC-Sierra is now Microsemi
- Senior Digital Design Engineer @ ST-Ericsson
- Senior Design Engineer @ Texas Instruments
- Consultant @ Amesys Conseil
- Ic Design Engineer @ PMC-Sierra is now Microsemi
Frederic Morin's Education
- Université Du Québec À Trois - Rivières
Bachelor of Arts
1993 - 1999
Frederic Morin's Skills
- Front End Development
- Static Timing Analysis
- RTL design
- Primetime
- Timing Closure
- DFT
- RTL coding
- Verilog
- Clock Tree Synthesis
- ASIC
Frederic Morin's Summary
Frederic Morin, based in Burnaby, BC, CA, is currently a Principal Design Engineer Architecture Emulation at Microchip Technology, bringing experience from previous roles at Microsemi Corporation, Maxlinear and PMC-Sierra. Frederic Morin holds a 1993 - 1999 Bachelor of Arts @ Université Du Québec À Trois - Rivières. With a robust skill set that includes Front End Development, Static Timing Analysis, RTL design, Primetime, Timing Closure and more, Frederic Morin contributes valuable insights to the industry. Frederic Morin has 2 emails on RocketReach.
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