Frederic Geiger Email
Staff CAD Engineer @ Arm
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Frederic Geiger Location
- Nice, FR
Frederic Geiger Work
- 2011 -now Staff CAD Engineer @
- 2010 -2011 Analog and RF IC Design Engineer @ ASTUS
- 1999 -2009 Senior Services Application Engineer @
Frederic Geiger Education
- University of Lyon, France
Frederic Geiger Skills
- EDA
- DRC
- LVS
- Cadence Virtuoso
- Physical Verification
- Integrated Circuit Design
- Physical Design
- CMOS
- Circuit Design
- Analog
- Parasitic Extraction
- Cadence
- Virtuoso ICADV12.2
- PDK Development
- PDK Validation
- PDK Support
- Pcells/Pycells
- SKILL/SKILL++
- Advanced nodes
- FinFET
- Multiple Patterning
- Bulk
- SOI
- Foundries
- DRM
- AMS IC Design Flows
- Simulation
- HSPICE
- Spectre
- Calibre DRC/LVS/xACT/PERC
- Hercules/ICV/StarRC
- Diva/Assura/PVS/QRC
- DFM
- ARM
- Synchronicity
- Semiconductors
- Microelectronics
- VLSI
- ASIC
- SoC
- Physical IPs
- Mixed Signal
- RF
- CAD
- UNIX/Linux
- Shell Scripting
- C/C++
- Python
- Perl
- Tcl
- Pdk
Frederic Geiger Summary
- Frederic Geiger, based in Nice, FR, is currently a Staff CAD Engineer at Arm. Frederic Geiger brings experience from previous roles at ASTUS and Cadence Design Systems. Frederic Geiger holds a University of Lyon, France. With a robust skill set that includes EDA, DRC, LVS, Cadence Virtuoso, Physical Verification and more. Frederic Geiger has 3 emails on RocketReach.
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