Francisco Duran Urrea's Location

Austin, TX, US

Francisco Duran Urrea's Work

  • GPU DFT Design Verification Manager @ Apple
  • Sr Manager ASIC IP Design Engineer @ AMD
  • Manager ASIC IP Design Engineer @ AMD

Francisco Duran Urrea's Education

  • Universidad de Los Andes

    Master of Science in Electronic Engineering and Computers (Emphasis in microelectronic)

    1999 - 2003
  • Universidad Pontificia Bolivariana

    Bachelor of Science in Electronic Engineer

    1993 - 1999

Francisco Duran Urrea's Skills

  • ASIC
  • RTL design
  • DFT
  • Verilog
  • SoC
  • Debugging
  • Processors
  • Logic Design
  • Logic Synthesis
  • Microprocessors

Francisco Duran Urrea's Summary

Francisco Duran Urrea, based in Austin, TX, US, is currently a GPU DFT Design Verification Manager at Apple, bringing experience from previous roles at AMD. Francisco Duran Urrea holds a 1999 - 2003 Master of Science in Electronic Engineering and Computers in Emphasis in microelectronic @ Universidad de Los Andes. With a robust skill set that includes ASIC, RTL design, DFT, Verilog, SoC and more, Francisco Duran Urrea contributes valuable insights to the industry. Francisco Duran Urrea has 2 emails on RocketReach.

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