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Felipe Cabral Location
Cork, IE
Felipe Cabral Work
2024 -now Staff and Manager - ASIC Digital Design Engineer @
2022 -2024 Staff - ASIC Digital Design Engineer @
2019 -2022 Senior - ASIC Digital Design Engineer @
2018 -2019 ASIC Digital Design Engineer @
2017 -2018 FPGA Intern @
2016 -2018 Graduate Student Researcher @
2015 -2016 Junior Digital IC Design Engineer @
2014 -2015 Trainee - Digital IC Design Engineer @
2013 -2013 Intern @ L-VIS
Felipe Cabral Education
Universidade de Brasilia
Master's degree (Mechatronic Systems, Embedded Systems and Intelligent Systems)
2016-2018
CI Brasil CT2, Campinas
Digital Integrated Circuits Designer (Microelectronics)
2014-2015
Universidade de Brasilia
Bachelor of Science (BSc) (Mechatronics (Control and Automation Engineering))
2008-2013
Felipe Cabral Skills
Altera Quartus
Arduino
Computer Architecture
Linux
Field Programmable Gate Arrays Fpga
AutoCAD
C
RTL design
Matlab
VLSI CAD
Government
Verilog
Cadence
Programming
Embedded Systems
MIPS
Labview
FPGA
VHDL
Microelectronics
CI
SystemVerilog
Design
C/C++ STL
Hdl Designer
Hardware Description Language
Electronics Hardware Design
Field Programmable Gate Arrays
Xilinx
Vivado
Algorithms
Ethernet
Mixed Signal
Git
Tortoise SVN
LaTeX
Altera
Digital IC Design
Digital Signal Processing
System on a Chip
Application Specific Integrated Circuits
ModelSim
Static Timing Analysis
OFDM
Orthogonal Frequency Division Multiplexing
Transceivers
SERDES
Felipe Cabral Summary
Felipe Cabral, based in Cork, IE, is currently a Staff and Manager - ASIC Digital Design Engineer at Qualcomm. Felipe Cabral brings experience from previous roles at Qualcomm and Nokia Bell Labs. Felipe Cabral holds a 2016 - 2018 Master's degree in Mechatronic Systems, Embedded Systems and Intelligent Systems @ Universidade de Brasilia. With a robust skill set that includes Altera Quartus, Arduino, Computer Architecture, Linux, Field Programmable Gate Arrays Fpga and more. Felipe Cabral has 2 emails on RocketReach.
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