F. Pan Email & Phone Number
Staff ASIC Design Engineer @ VitalConnect
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F. Pan Location
- San Jose, CA, US
F. Pan Work
- 2013 -now Staff ASIC Design Engineer @
- 2012 -2013 Principal Engineer @
- 2005 -2012 System Architect and Sr. Staff @
- 2004 -2005 MTS @
- 2000 -2003 Staff Engineer @
- 1997 -2000 Sr. Staff Engineer @ Sierra Imaging, Inc.
- 1995 -1997 ASIC Design Engineer @ Tseng Labs, Inc.
- 1992 -1995 System Analyst @ Roy F. Weston Inc., PA
F. Pan Education
- University of Pennsylvania
(Master of Science (MS), Electrical Engineering)
- University of Pennsylvania
Doctor of Philosophy (Ph.D.) (Doctor of Philosophy (Ph.D.), Electrical Engineering)
- Beijing University of Aeronautics and Astronautics
Master of Science (MS) (Master of Science (MS), Electro/Mech. Engineering)
- Beijing University of Aeronautics and Astronautics
Bachelor of Science (BS) (Bachelor of Science (BS), Electrical Engineering)
F. Pan Summary
- F. Pan, based in San Jose, CA, US, is currently a Staff ASIC Design Engineer at Vital Connect, Inc.. F. Pan brings experience from previous roles at Symmetricom, Inc., Juniper Networks, NuCORE Technology and NetScreen Technologies. F. Pan holds a University of Pennsylvania.
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