Master of Science (Advance Communications and Digital Signal Processing)
1993 - 1994
UCL
Bachelor of Engineering (Electronics and Electrical Engineering)
1990 - 1993
Raffles Junior College
A'Levels
1986 - 1987
Raffles Institution
O'levels
1983 - 1985
ACSJ
Eu Goh's Skills
Integrated Circuit Design
DFT
Timing Closure
Logic Design
FPGA
RTL coding
Xilinx
IC
VLSI
Field-Programmable Gate Arrays (FPGA)
Eu Goh's Summary
Eu Goh, based in Singapore, is currently a Senior Director, Design Engineering at AMD, bringing experience from previous roles at Xilinx and Agere Systems Singapore. Eu Goh holds a 1993 - 1994 Master of Science in Advance Communications and Digital Signal Processing @ Imperial College London. With a robust skill set that includes Integrated Circuit Design, DFT, Timing Closure, Logic Design, FPGA and more, Eu Goh contributes valuable insights to the industry. Eu Goh has 2 emails and 1 mobile phone number on RocketReach.