Erwin Peterlin Email
Digital Design and Verification Engineer @ semify
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Erwin Peterlin Location
- Graz, AT
Erwin Peterlin Work
- Digital Design and Verification Engineer @ (August 2021 - Present)
Erwin Peterlin Education
- Technische Universität Graz
Computer Science
2016-2022
Erwin Peterlin Skills
- Digital IC Design
- Field-Programmable Gate Arrays (FPGA)
- Application-Specific Integrated Circuits (ASIC)
- English
- Computer Science
- Python (Programming Language)
- Functional Verification
- C (Programming Language)
- C++
- FPGA prototyping
- Microcontrollers
- Integrated Circuit Design
- SystemVerilog
- Verilog
- RTL Design
Erwin Peterlin Summary
- Erwin Peterlin, based in Graz, AT, is currently a Digital Design and Verification Engineer at semify. Erwin Peterlin holds a 2016 - 2022 Computer Science @ Technische Universität Graz. With a robust skill set that includes Digital IC Design, Field-Programmable Gate Arrays (FPGA), Application-Specific Integrated Circuits (ASIC), English, Computer Science and more. Erwin Peterlin has 1 emails on RocketReach.
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