Erik Schlanger Email & Phone Number
SOC Design Lead @ Untether AI
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Erik Schlanger Location
- Austin, TX, US
Erik Schlanger Work
- SOC Design Lead @ (October 2023 - Present)
- Principal Engineer & Chip Lead @ (November 2022 - October 2023)
- Technical Director and Inference Soc Architect @ (September 2021 - November 2022)
- Digital Engineering Lead @ (February 2020 - September 2021)
- Engineer @ (August 2017 - February 2020)
- Director of Digital Design @ (February 2017 - August 2017)
- Director of Hardware Development @ (August 2011 - December 2016)
- Senior Manager MPS Hardware @ (November 2009 - July 2011)
- Senior Staff Engineer @ (August 2006 - November 2009)
- Hardware Design Engineer @ (November 2004 - July 2006)
- Member Technical Staff @ (February 2002 - November 2004)
- Logic Design and Verification @ Alchemy Semiconductor (February 1999 - February 2002)
- Consulting Engineer @ (May 1997 - February 1999)
Erik Schlanger Education
- Florida Institute of Technology
Master Of Science (Electrical Engineering, Computer Engineering)
1993-1997 - University of Rochester
Bachelor Of Science (Electrical Engineering)
1989-1993
Erik Schlanger Skills
- ASIC
- Consumer Electronics
- Debugging
- Embedded Software
- Embedded Systems
- FPGA
- Hardware
- Hardware Architecture
- IC
- Logic Design
- Microprocessors
- Processors
- RTL design
- Semiconductors
- SoC
- System Architecture
- SystemVerilog
- VLSI
- Verilog
Erik Schlanger Summary
- Erik Schlanger, based in Austin, TX, US, is currently a SOC Design Lead at Untether AI. Erik Schlanger brings experience from previous roles at Luminous Computing, Flex Logix Technologies, Inc., Ambiq Micro and NXP Semiconductors. Erik Schlanger holds a 1993 - 1997 Master Of Science in Electrical Engineering, Computer Engineering @ Florida Institute of Technology. With a robust skill set that includes ASIC, Consumer Electronics, Debugging, Embedded Software, Embedded Systems and more. Erik Schlanger has 2 emails and 3 mobile phone numbers on RocketReach.
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