Erick Pew Email & Phone Number
Senior Staff Engineer @ SigmaSense
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Erick Pew Location
- Boise, ID, US
Erick Pew Work
- 2018 -now Senior Staff Engineer @
- 2006 -2017 Senior Staff Engineer @
- 2005 -2006 ASIC Design Engineer @
- 2003 -2005 ASIC Design Engineer @
- 2002 -2003 ASIC Design Engineer @
- 2001 -2002 ASIC Design Engineer @ In System Design
- 1984 -2000 Hardware Design Engineer @
Erick Pew Education
- UC Santa Barbara
MSCE
1991-1992 - Brigham Young University
BSEE
1976-1984
Erick Pew Skills
- Debugging
- ASIC
- SoC
- Verilog
- USB
- ARM
- RTL design
- Embedded Systems
- Semiconductors
- Hardware Architecture
- Logic Design
- Functional Verification
- Primetime
- Integrated Circuit Design
- Circuit Design
- Logic Analyzer
Erick Pew Summary
- Erick Pew, based in Boise, ID, US, is currently a Senior Staff Engineer at SigmaSense. Erick Pew brings experience from previous roles at Marvell Semiconductor, Avago Technologies, Agilent Technologies and Cypress Semiconductor. Erick Pew holds a 1991 - 1992 MSCE @ UC Santa Barbara. With a robust skill set that includes Debugging, ASIC, SoC, Verilog, USB and more. Erick Pew has 2 emails and 1 mobile phone numbers on RocketReach.
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