Eric Thorne Email & Phone Number
FPGA Verification Engineer @ Joby Aviation
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Eric Thorne Location
- Santa Cruz, CA, US
Eric Thorne Work
- FPGA Verification Engineer @ (February 2022 - Present)
Eric Thorne Education
- University of California, Santa Cruz
Master of Science (Computer Engineering)
1998-2000 - University of California, Santa Cruz
Bachelor of Science (Computer Engineering)
1994-1998 - Walnut High School
Eric Thorne Skills
- HR
- Semiconductors
- Operations
- Finance
- Silicon Interposer
- ATPG
- Hardware Architecture
- Logic Design
- Cadence Virtuoso
- Arduino
- Test Automation
- Xilinx Vivado
- Debugging
- Integrated Circuits
- Perl
- Functional Verification
- RTL design
- DFT
- ASIC
- Electronics
- Transimpedance Amplifier
- Xilinx ISE
- VLSI
- Verilog
- Xilinx
- Electrical Diagnosis
- Board Layout
- TCL
- Circuit Design
- 3d Ics
- Embedded Systems
- CMOS
- Testing
- FPGA
- SoC
- Printed Circuit Board Design
- VHDL
- EDA
- Failure Analysis
- Python
- Firmware
- Computer Engineering
- Field Programmable Gate Arrays
- Schematic Capture
- Bash
Eric Thorne Summary
- Eric Thorne, based in Santa Cruz, CA, US, is currently a FPGA Verification Engineer at Joby Aviation. Eric Thorne holds a 1998 - 2000 Master of Science in Computer Engineering @ University of California, Santa Cruz. With a robust skill set that includes HR, Semiconductors, Operations, Finance, Silicon Interposer and more. Eric Thorne has 3 emails and 2 mobile phone numbers on RocketReach.
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