Eric Rentschler Email & Phone Number
Debug Architect @ Tenstorrent Inc.
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Eric Rentschler Location
- Steamboat Springs, CO, US
Eric Rentschler Work
- Debug Architect @ (June 2024 - Present)
- Fellow and Chief Validation Engineer @ (September 2022 - May 2024)
- Chief Validation Scientist @ (May 2014 - September 2022)
- Fellow @ (April 2006 - April 2014)
- Senior Engineer @ (January 2005 - April 2006)
- Engineer @ (January 1989 - January 2005)
Eric Rentschler Education
- University of Michigan
BS (Electrical Engineering)
1987-1989 - Bowling Green State University
Bachelors of Science (Electronic Technology)
1983-1986
Eric Rentschler Skills
- ASIC
- CPU design
- Change Management
- Computer Architecture
- Computer Hardware
- Creating Results
- DFT
- Debugging
- Driving Change
- EDA
- Embedded Systems
- Engineering Management
- FPGA
- Functional Verification
- Hardware
- Hardware Architecture
- IC
- Integrated Circuit Design
- Leading Innovation
- Logic Design
- Low-power Design
- Microprocessors
- Perl
- Physical Design
- Processors
- RTL Design
- Semiconductors
- SoC
- Static Timing Analysis
- System Architecture
- SystemVerilog
- TCL
- VLSI
- Verilog
- Graphics
- Data Validation
- Validation
- Low Power Design
Eric Rentschler Summary
- Eric Rentschler, based in Steamboat Springs, CO, US, is currently a Debug Architect at Tenstorrent. Eric Rentschler brings experience from previous roles at Woodpecker Semiconductor, Mentor Graphics, AMD and Intel Corporation. Eric Rentschler holds a 1987 - 1989 BS in Electrical Engineering @ University of Michigan. With a robust skill set that includes ASIC, CPU design, Change Management, Computer Architecture, Computer Hardware and more. Eric Rentschler has 2 emails and 2 mobile phone numbers on RocketReach.
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