Eric Pettus Email & Phone Number

Eric Pettus Skills

• EDA
• TCL
• Physical Design
• LVS
• Perl
• ASIC
• IC
• Parasitic Extraction
• QRC
• Star-RCXT
• Cadence
• VLSI
• Calibre
• Integrated Circuit Design
• Place & Route
• Static Timing Analysis
• CAD
• SoC
• Circuit Design
• Physical Verification
• Microprocessors
• Cadence Encounter
• Semiconductors
• RTL Design
• Logic Synthesis
• Physical Synthesis
• PDK Development
• Conformal LEC
• DesignSync
• Cadence Virtuoso
• SPICE
• Assura
• Hercules
• RCX
• PERC
• Verilog
• Simulations
• SystemVerilog
• Analog
• ModelSim
• Debugging
• Layout Versus Schematic (LVS)
• Very-Large-Scale Integration (VLSI)
• Design Rule Checking (DRC)
• Application-Specific Integrated Circuits (ASIC)
• Integrated Circuits (IC)
• Cmos
• Layout Versus Schematic Lvs
• Design Rule Checking Drc
• Software
• Place and Route
• Pdk
• Integrated Circuits Ic
• Application Specific Integrated Circuits Asic
• Star Rcxt
• DRC
• Rc Extraction
• Very Large Scale Integration Vlsi
• Layout Versus Schematic
• Very Large Scale Integration
• Design Rule Checking
• Application Specific Integrated Circuits
• Integrated Circuits