Eric Bruns Email & Phone Number
Low Yield Analysis and Technology Development Engineer @ Intel Corporation
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Eric Bruns Location
- Hillsboro, OR, US
Eric Bruns Work
- Low Yield Analysis and Technology Development Engineer @ (December 2016 - Present)
- Technology Development and Integration Yield Engineer @ (July 2015 - December 2016)
- Virtual Fab Defect Metrology and Yield Engineer @ (July 2011 - June 2015)
- Defect Inspection Marketing Manager @ (November 2007 - August 2008)
- Wafer Inspection Applications Expert @ (August 2004 - October 2007)
- Arts Writer, Copy Editor, Photographer @ The St. Petersburg Times (August 2002 - May 2004)
- Senior Field Applications Engineer @ (August 1999 - December 2001)
- Senior Applications Development Engineer @ (September 1997 - July 1999)
Eric Bruns Education
- The University of Texas at Austin
Master of Science
1993-1995 - United States Naval Academy
Bachelor of Science
1989-1993
Eric Bruns Summary
- Eric Bruns, based in Hillsboro, OR, US, is currently a Low Yield Analysis and Technology Development Engineer at Intel Corporation. Eric Bruns brings experience from previous roles at Intel Corporation and Applied Materials. Eric Bruns holds a 1993 - 1995 Master of Science @ The University of Texas at Austin. Eric Bruns has 2 emails and 1 mobile phone numbers on RocketReach.
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