Eric Bruns Email & Phone Number
Low Yield Analysis and Technology Development Engineer @ Intel Corporation
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Eric Bruns Location
- Hillsboro, OR, US
Eric Bruns Work
- 2016 -now Low Yield Analysis and Technology Development Engineer @
- 2015 -2016 Technology Development and Integration Yield Engineer @
- 2011 -2015 Virtual Fab Defect Metrology and Yield Engineer @
- 2007 -2008 Defect Inspection Marketing Manager @
- 2004 -2007 Wafer Inspection Applications Expert @
- 2002 -2004 Arts Writer, Copy Editor, Photographer @ The St. Petersburg Times
- 1999 -2001 Senior Field Applications Engineer @
- 1997 -1999 Senior Applications Development Engineer @
Eric Bruns Education
- The University of Texas at Austin
Master of Science
1993-1995 - United States Naval Academy
Bachelor of Science
1989-1993
Eric Bruns Summary
- Eric Bruns, based in Hillsboro, OR, US, is currently a Low Yield Analysis and Technology Development Engineer at Intel Corporation. Eric Bruns brings experience from previous roles at Intel Corporation and Applied Materials. Eric Bruns holds a 1993 - 1995 Master of Science @ The University of Texas at Austin. Eric Bruns has 2 emails on RocketReach.
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