Durga P Email

Durga P Email

Sr silicon design engineer @ AMD

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Durga P Location

Andhra Pradesh, India

Durga P Work

Durga P Education

  • Jawaharlal Nehru Technological University, Kakinada

    Master of Technology - MTech(VLSI design)

    2014 - 2016
  • Pragati Engineering College

    Bachelor of Technology - BTech (Electrical, Electronics and Communications Engineering)

    2009 - 2013
  • Bhashyam College of Education kakinada

    SSC (10th)

    2007

Durga P Skills

  • Verilog
  • system verilog
  • Universal Verification Methodology (UVM)
  • Very-Large-Scale Integration (VLSI)
  • ASIC
  • Semiconductors
  • C
  • Linux
  • Perl
  • questa sim

Durga P Summary

Durga P, based in Andhra Pradesh, India, is currently a Sr silicon design engineer at AMD. Durga P brings experience from previous roles at Cerium Systems, Asiczen Technologies and Wave Computing. Durga P holds a 2014 - 2016 Master of Technology - MTech(VLSI design) @ Jawaharlal Nehru Technological University, Kakinada. With a robust skill set that includes Verilog, system verilog, Universal Verification Methodology (UVM), Very-Large-Scale Integration (VLSI), ASIC and more. Durga P has 3 emails on RocketReach.
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