Dinesh Kirran Email
Mixed Signal verification Engineer @ Iravan
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Dinesh Kirran Location
- Chennai, TN, IN
Dinesh Kirran Work
- 2024 -now Mixed Signal verification Engineer @
- 2024 -2025 Analog circuit design Trainee @
- 2022 -2024 Design Verification Engineer @ DEVI TECH solutions
Dinesh Kirran Education
- Indian Institute of Technology Jammu
Master of Technology - MTech (Vlsi design)
2025-2027 - Panimalar Engineering College
Bachelor of Engineering - BE (Electrical and Electronics Engineering)
2018-2022
Dinesh Kirran Skills
- Verilog-AMS
- Formal Verification
- SoC verification
- Universal Verification Methodology (UVM)
- SystemVerilog
- Verilog
- RAL
Dinesh Kirran Summary
- Dinesh Kirran, based in Chennai, TN, IN, is currently a Mixed Signal verification Engineer at Iravan. Dinesh Kirran brings experience from previous roles at Takshila Institute of VLSI Technologies and DEVI TECH solutions. Dinesh Kirran holds a 2025 - 2027 Master of Technology - MTech in Vlsi design @ Indian Institute of Technology Jammu. With a robust skill set that includes Verilog-AMS, Formal Verification, SoC verification, Universal Verification Methodology (UVM), SystemVerilog and more. Dinesh Kirran has 1 emails on RocketReach.
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