Dhanush K Email
Senior Silicon Design Engineer @ AMD
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Dhanush K Location
- Bengaluru, KA, IN
Dhanush K Work
- Senior Silicon Design Engineer @ (March 2024 - Present)
- Lead Engineer @ (June 2022 - February 2024)
- Senior Design Verification Engineer @ (April 2021 - June 2022)
- Project Engineer @ (April 2018 - March 2021)
- Design Verification Engineer @ (October 2022 - September 2023)
- Digital Mixed Signal Engineer from Synapse Design @ (July 2018 - July 2020)
- VLSI Design and Verification Trainee @ (September 2017 - March 2018)
Dhanush K Education
- ATME College of Engineering, Mysuru
Bachelor of Engineering (B.E.) (Electronics)
2013-2017 - Marimallappa PU College, Mysuru 2011-2013
Dhanush K Skills
- Analog Circuits
- Application-Specific Integrated Circuits (ASIC)
- C (Programming Language)
- C++
- Current Affairs
- Debugging
- Digital Electronics
- Electronic Components
- Functional Verification
- IP Verification
- Network analysis
- RTL Verification
- SOC Verification
- SV-RNM
- Scripting
- Semiconductors
- System on a Chip (SoC)
- SystemVerilog
- Test Planning
- Universal Verification Methodology (UVM)
- Verilog
- Very-Large-Scale Integration (VLSI)
Dhanush K Summary
- Dhanush K, based in Bengaluru, KA, IN, is currently a Senior Silicon Design Engineer at AMD. Dhanush K brings experience from previous roles at Synapse Design Inc. and Meta. Dhanush K holds a 2013 - 2017 Bachelor of Engineering (B.E.) in Electronics @ ATME College of Engineering, Mysuru. With a robust skill set that includes Analog Circuits, Application-Specific Integrated Circuits (ASIC), C (Programming Language), C++, Current Affairs and more. Dhanush K has 2 emails on RocketReach.
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Dhanush K
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