Devin Wu Email

Devin Wu Email

PMTS Packaging Engineer @ AMD

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Devin Wu Location

Taiwan

Devin Wu Work

  • 2022 - now  PMTS Packaging Engineer @ AMD
  • 2021 - 2022 Principal Package Integration Engineer @ TSMC
  • 2013 - 2020 Principle Package Process Integration Engineer @ TSMC

Devin Wu Education

  • National Tsing Hua University

    Master of Science (MS) (Engineering and System Science)

    2000 - 2002

Devin Wu Skills

  • Solder formation by printing and pasting
  • Wafer bumping processes integration
  • Dielectric film formation
  • Semiconductor Industry
  • Design of Experiments
  • Failure Analysis
  • CVD
  • PVD
  • Plating
  • E-less plating

Devin Wu Summary

Devin Wu, based in Taiwan, is currently a PMTS Packaging Engineer at AMD. Devin Wu brings experience from previous roles at TSMC. Devin Wu holds a 2000 - 2002 Master of Science (MS) in Engineering and System Science @ National Tsing Hua University. With a robust skill set that includes Solder formation by printing and pasting, Wafer bumping processes integration, Dielectric film formation, Semiconductor Industry, Design of Experiments and more. Devin Wu has 2 emails on RocketReach.
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