Devin Persaud's Location
Santa Clara, CA, US
Devin Persaud's Work
- Sr. TPM Manager @ Google
- Staff Applications Engineer @ Cadence Design Systems
- Principal Applications Engineer @ Cadence Design Systems
- Senior Applications Engineer and Technical Sales Leader @ Cadence Design Systems
- Hardware Engineer @ Intel Corporation
- RTL Design Engineer @ Intel Corporation
- Software Engineer @ Intel Corporation
- Project Analyst @ Intel Corporation
- Graduate Teaching Assistant @ University of Minnesota
- Graduate Intern Technical @ Intel Corporation
Devin Persaud's Education
- University of Minnesota
Master of Science (Electrical Engineering)
2007 - 2009 - University of Minnesota
Bachelor of Science (Electrical Engineering)
2004 - 2007 - University of Minnesota
Bachelor of Science (Computer Engineering)
2004 - 2007
- University of Minnesota
Bachelor of Science (Mathematics)
2004 - 2007
Devin Persaud's Skills
- Verilog
- Computer Architecture
- C++
- FPGA
- VHDL
- Bluetooth
- USB
- Hardware Architecture
- Microprocessors
- Java
Devin Persaud's Summary
Devin Persaud, based in Santa Clara, CA, US, is currently a Sr. TPM Manager at Google, bringing experience from previous roles at Cadence Design Systems and Intel Corporation. Devin Persaud holds a 2007 - 2009 Master of Science in Electrical Engineering @ University of Minnesota. With a robust skill set that includes Verilog, Computer Architecture, C++, FPGA, VHDL and more, Devin Persaud contributes valuable insights to the industry. Devin Persaud has 2 emails on RocketReach.
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