Devaraj M Email
Principal Verification Engineer @ Microsoft
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Devaraj M Location
- Bengaluru, KA, IN
Devaraj M Work
- Principal Verification Engineer @ (March 2026 - Present)
- SOC and IP verification Engineer @ (November 2023 - March 2026)
- Verification Engineer @ (July 2018 - November 2023)
- Lead Engineer @ (August 2017 - June 2018)
- Senior VLSI CAD Engineer @ (December 2015 - August 2017)
- CAD Engineer @ (November 2010 - November 2015)
Devaraj M Education
- M S Ramaiah Institute Of Technology
Master's degree (Digital Electronics and Communication)
2008-2010
Devaraj M Skills
- SystemVerilog
- UPF
- low power verification
- Shell Scripting
- Debugging
- Semiconductors
- Verilog
- clearcase
- Unix
- Functional Verification
- Perl Automation
- Flow development
- Makefile
- Tcl
- Universal Verification Methodology (UVM)
- VLSI
- Vlsi Backend Flow
- System Verilog
- Universal Verification Methodology Uvm
Devaraj M Summary
- Devaraj M, based in Bengaluru, KA, IN, is currently a Principal Verification Engineer at Microsoft. Devaraj M brings experience from previous roles at Microsoft, Intel Corporation, Qualcomm and Sankalp Semiconductor Inc. Devaraj M holds a 2008 - 2010 Master's degree in Digital Electronics and Communication @ M S Ramaiah Institute Of Technology. With a robust skill set that includes SystemVerilog, UPF, low power verification, Shell Scripting, Debugging and more. Devaraj M has 1 emails on RocketReach.
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