Dev Desai Email & Phone Number

Dev Desai Skills

• Altera Quartus
• Application-Specific Integrated Circuits (ASIC)
• C
• C++
• Cadence Virtuoso
• Cisco Routers
• Computer Architecture
• Convolutional Neural Networks (CNN)
• Cross-functional Team Leadership
• Data Encryption Standards
• Design Verification Testing
• Digital Signal Processing
• Ethernet sw
• Field-Programmable Gate Arrays (FPGA)
• Fpga
• Image Processing
• Leadership
• Logic Synthesis
• Management
• Matlab
• Microsoft Azure
• Microsoft Excel
• Microsoft Office
• Microsoft PowerPoint
• Microsoft Word
• ModelSim
• Network interface card
• Nios II
• Perl
• Place & Route
• PowerPoint
• Programming
• Python
• RTL Coding
• RTL Development
• RTL Verification
• Research
• Semiconductor Device
• Software Defined Networking
• Static Timing Analysis
• Synopsys tools
• System verilog
• SystemVerilog
• Systems Design
• Universal Verification Methodology (UVM)
• Verilog
• Very-Large-Scale Integration (VLSI)
• Xilinx Vivado
• Field Programmable Gate Arrays Fpga
• Place And Route
• HTML
• VHDL
• Universal Verification Methodology Uvm
• Hdlc
• Very Large Scale Integration Vlsi
• Universal Verification Methodology
• Very Large Scale Integration
• Field Programmable Gate Arrays