Deepak Ravindran Email & Phone Number

Deepak Ravindran Skills

• Tessent IJTAG
• Synopsys VCS/DVE/Verdi
• Printed Circuit Board (PCB) Design
• pattern simulation
• first silicon power on
• IJTAG
• MBIST
• TCL
• Python (Programming Language)
• Synopsys tools
• Computer Hardware
• Verilog HDL
• Perl
• C
• SystemC
• VHDL
• FPGA
• Synopsys Design Compiler
• NCSim
• Conformal LEC
• Cadence Encounter SoC Auto P&R
• C++
• Synopsys TetraMAX ATPG
• Synopsys PrimeTime STA
• ModelSim
• Xilinx ISE
• Cadence Virtuoso Schematic Editor
• Cadence Virtuoso Layout Suite
• Xilinx Chipscope
• Cadence SimVision,
• Syntricity dataConductor
• Embedded Systems
• Debugging
• Mentor Graphics DxDesigner for PCB Schematic
• Cadence OrCAD Capture for PCB Schematic Flow
• Cadence Allegro Physical Viewer for PCB Design Flow
• Board Bring-up
• Trace32
• Altera Quartus II
• Verilog
• Algorithms
• SimpleScalar simoutorder CPU Performance Simulator
• ASIC
• VLSI
• High-speed Digital Design
• SoC
• Computer Architecture
• Matlab
• Testing
• Field-Programmable Gate Arrays (FPGA)
• Cadence Encounter Soc
• Cadence Virtuoso
• Field Programmable Gate Arrays Fpga
• SRAM
• Cadence Virtuoso Layout
• Cadence Nc Verilog
• Intel
• Cadence Encounter
• Circuit Design
• Cadence Orcad Capture
• Silicon Validation
• High Speed Digital Design
• Simplescalar
• Mentor Graphics
• Cadence Simvision
• Cadence Allegro
• High Speed Digital
• Field Programmable Gate Arrays