Design Verification Enginner @ (March 2024 - December 2025)
SoC Design Verification Enginner and Management @ (November 2022 - January 2024)
SoC Design Verification Engineer and Management @ (March 2022 - November 2022)
Design verification trainee @ Futurewiz (Collaboration with Truechip Solutions) (August 2021 - March 2022)
Deepak Kakkar Education
PDM College of Engg.
Bachelor of Engineering (B.E.) (ECE)
2004-2008
MS Saraswati Sr. Sec School ,Rohtak
10+2
2003-2004
Deepak Kakkar Skills
Management
Telecommunications
Marketing
Mobile Devices
Vendor Management
Mobile Applications
Business Development
MIS
CRM
Vas Products development, Vas Operations, Vas Marketing, Multi Operator Handling
IVR, USSD, U & R, Data, WAP, SMS & VOICE SERVICES
SMS
WAP
Service Delivery
Product Development
Account Management
Operations Management
Pre-sales
Product Management
Competitive Analysis
Product Marketing
Key Account Management
Project Management
Mobile Commerce
Team Management
VAS
IVR
Vas Products Development
Vas Marketing
U And R
USSD
Vas Operations
Sms And Voice Services
Data
Operations
Testing
Multi Operator Handling
Vas Products
Pre Sales
Deepak Kakkar Summary
Deepak Kakkar, based in Rohtak, HR, IN, is currently a Senior Design Verification Engineer at Vayavya Labs. Deepak Kakkar brings experience from previous roles at Vayavya Labs, Vtool - Smart Verification, P&C Tech Consultants Ltd ( Acquired by Vtool - Smart Verification, www.thevtool. and Futurewiz (Collaboration with Truechip Solutions). Deepak Kakkar holds a 2004 - 2008 Bachelor of Engineering (B.E.) in ECE @ PDM College of Engg.. With a robust skill set that includes Management, Telecommunications, Marketing, Mobile Devices, Vendor Management and more. Deepak Kakkar has 2 emails and 1 mobile phone numbers on RocketReach.
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