Deepak Dahiya's Location
Leeds, Leeds, United Kingdom
Deepak Dahiya's Work
- Physical Design Engineer @ Intel Corporation
- Senior Design Engineer - Full Custom Layouts and Methodology @ STMicroelectronics
Deepak Dahiya's Education
- Pusa Institute, New Delhi , India
(Engineering, Electronics)
2000 - 2003 - Bal Bharti School1999 - 2000
- Pusa Institute
Bachelor of Technology (Electronics, Engineering, Communications)
Deepak Dahiya's Skills
- Cadence Virtuoso
- Layout Versus Schematic Lvs
- System on a Chip Soc
- Physical Verification
- Analog
- ASIC
- Parasitic Extraction
- Education
- VLSI
- Verilog
Deepak Dahiya's Summary
Deepak Dahiya, based in Leeds, Leeds, United Kingdom, is currently a Physical Design Engineer at Intel Corporation, bringing experience from previous roles at Stmicroelectronics. Deepak Dahiya holds a 2000 - 2003 Pusa Institute, New Delhi , India. With a robust skill set that includes Cadence Virtuoso, Layout Versus Schematic Lvs, System on a Chip Soc, Physical Verification, Analog and more, Deepak Dahiya contributes valuable insights to the industry. Deepak Dahiya has 1 email and 1 mobile phone number on RocketReach.
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