Deepak Bansal Email & Phone Number
Senior VP of Engineering @ Roguebeam
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Deepak Bansal Location
- Kirkland, WA, US
Deepak Bansal Work
- Senior VP of Engineering @ (September 2026 - Present)
- Technical Advisor @ (August 2026 - Present)
- Sr. Director (ASIC and FPGA Engineering) @ (August 2022 - July 2025)
- Director (ASIC and FPGA Engineering) @ (August 2021 - August 2022)
- Senior Manager (ASIC and FPGA Engineering) @ (December 2018 - August 2021)
- Principal Network Processor Lead @ (June 2015 - December 2018)
- Senior Architect and Group Manager (ASIC Engineering) @ (October 2010 - June 2015)
- Sr. Engineer (Architect) @ (July 2001 - October 2010)
- Member of Technical Staff @ (July 2001 - December 2008)
- Sr. Design Engineer @ (November 1999 - June 2001)
- Senior Design Engineer @ (September 1997 - October 1999)
- Design Engineer @ (March 1997 - September 1997)
- Design Engineer @ DCM Data Systems (July 1995 - March 1997)
Deepak Bansal Education
- UW Foster School of Business
Executive MBA (Business)
2016-2018 - Netaji Subhas Institute of Technology
B.E. (Electronics & Communications)
1991-1995
Deepak Bansal Skills
- 10G Ethernet
- ARM Architecture
- ASIC
- AXI4
- Altera
- Application-Specific Integrated Circuits (ASIC)
- Carrier Ethernet
- Cloud Computing
- DDR4
- Data Center
- Electrical Engineering
- Embedded Systems
- Engineering Management
- Ethernet
- FPGA
- Field-Programmable Gate Arrays (FPGA)
- Hardware
- Hardware Architecture
- IP
- IPSec
- IPv4
- IPv6
- Interlaken
- Internet Protocol (IP)
- L2/L3 protocols
- LAN Switching
- Leadership
- MPLS
- Multiprotocol Label Switching (MPLS)
- NFV
- Networking
- OpenFlow
- PBB
- PCIE
- QoS
- Routing
- SDN
- Silicon Validation
- System Architecture
- System on a Chip (SoC)
- TCP/IP
- Traffic Engineering
- VHDL
- VLL
- VPLS
- Verilog
- Xilinx
- Brocade
- Troubleshooting
- Strategic Planning
- Integration
- C/C++
- Git
- Software Design
- Network Programming
- Linux
- Algorithms
- Field Programmable Gate Arrays Fpga
- PPP
- C
- System On A Chip Soc
- Multiprotocol Label Switching Mpls
- Telecommunications
- Wireshark
- ClearCase
- C/C Stl
- SIP
- UDP
- Data Structures
- Algorithm Design
- Embedded Linux
- Application Specific Integrated Circuits Asic
- Perforce
- Internet Protocol Ip
- C/C
- Multithreading
- Software Development
- Unix
- STL
- Device Drivers
- Routing Protocols
- GNU Debugger
- Object Oriented Design
- Field Programmable Gate Arrays
- Internet Protocol
- Multiprotocol Label Switching
- Application Specific Integrated Circuits
- System on a Chip
Deepak Bansal Summary
- Deepak Bansal, based in Kirkland, WA, US, is currently a Senior VP of Engineering at RogueBeam. Deepak Bansal brings experience from previous roles at RogueBeam and SpaceX. Deepak Bansal holds a 2016 - 2018 Executive MBA in Business @ UW Foster School of Business. With a robust skill set that includes 10G Ethernet, ARM Architecture, ASIC, AXI4, Altera and more. Deepak Bansal has 3 emails and 3 mobile phone numbers on RocketReach.
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